Fault simulation for structural testing of analogue integrated circuits

Spinks, Stephen James

Electric apparatus and appliances; Electronic apparatus and appliances; Electric circuits; Electronic circuits; Computer software
February 1998

Thesis or dissertation


Rights
© 1998 Stephen James Spinks. All rights reserved. No part of this publication may be reproduced without the written permission of the copyright holder.
Abstract

In this thesis the ANTICS analogue fault simulation software is described which provides a statistical approach to fault simulation for accurate analogue IC test evaluation. The traditional figure of fault coverage is replaced by the average probability of fault detection. This is later refined by considering the probability of fault occurrence to generate a more realistic, weighted test metric. Two techniques to reduce the fault simulation time are described, both of which show large reductions in simulation time with little loss of accuracy.

The final section of the thesis presents an accurate comparison of three test techniques and an evaluation of dynamic supply current monitoring. An increase in fault detection for dynamic supply current monitoring is obtained by removing the DC component of the supply current prior to measurement.

Publisher
Department of Electronic Engineering, The University of Hull
Ethos identifier
uk.bl.ethos.301372
Qualification level
Doctoral
Qualification name
PhD
Language
English
Extent
26 MB
Identifier
hull:8047
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